Transistorized core flip-flop



Aug. 1, 1961 E. GICLARK 2,994,788

TRANSISTORIZED CORE FLIP-FLOP Original Filed Dec. 20, 1956 INVENTOR.

EDWARD GARY CLARK ATTORNEY United States Patent 2,994,788 TRANSISTORIZEDCGRE FLIP-FLOP Edward Gary Clark, Paoli, Pa., assignor to BurroughsCorporation, Detroit, Mich, a corporation of Michigan Originalapplication Dec. 20, 1956, Ser. No. 629,570, now Patent No. 2,945,965,dated July 19, '1960. Divided and this application May 18, 1960, Ser.No. 29,892 5 Claims. (Cl. 307 88.5)

This invention relates to bistable devices, and more particularly, tocomplementing flip-flops.

' This is a division of application Serial Number 629,570, filedDecember 20, 1956, for Complementing Flip-Flops, now Patent Number2,945,965, issued July 19, 1960, and assigned to the same assignee.Another divisional application, filed the same day asgthis application,is Serial Number 29,893.

A flip-flop is a device having two stable states and two input terminals(or types of input signals) each of which corresponds with one of thetwo states. The device remains in either of its two states until causedto change to its other state by the application of the correspondingsignal. A flip-flop may be changed to a complementing flip-flop by theaddition of steering gates. 'Means is provided for coupling the steeringgates to the flip-flop and topa single input terminal. By theapplication of pulses to the input terminal, signals are generated inthe steering gates which cause the flip-flop to change state for eachpulse applied.

l g In a complementing flip-flop having two steering gates,

one of which is enabled and the other of which is disabled, the actionin response to each complementing input signal, or each complementinginput pulse, can be divided into two events. The first event resultsfrom applying a complementing pulse to the enabled steering gate. Theenabled steering gate then applies a pulse to the proper input terminalof the flip-flop, which pulse causes the flip-flop to change to itsother state. The second event is thereversal of the steering gates inpreparationforithe next pulse of the complementing input signal.

' When the steering gates reverse, the gate that was enabled at the timethe first complementing pulse was initially applied becomes disabled,and the gate that was disabled becomes enabled. Each complementing inputpulse has a given width, the period of time the pulse is present orapplied. A phenomenon known in the art as time race occurs if thesteering gates reverse while the complementing pulse, whichisresponsible for the reversal, is 'still present; When time race occurs,the complementing input pulse will cause the flip-flop to return to itsinitial state; and the flip-flop will continue to change state, oroscillate, as longas the complementing input pulse is present. The finalstate of the complementing flip-flop will then be a function of thepulse width of each complementing input pulse.

Time race has heretofore been avoided bydelaying the reversal of thesteering gates due to the change of state of the flip-flop for a fixedperiod of time by various types of delay circuits, such as integratingcircuits, delay lines, etc. A complementing flip-flop having some meansfor delaying the reversal of the steering gates for a fixed period willhereafter be referred to as having unconditional steering. Time race ina complementing flip-flop having unconditional steering is prevented byrestricting the width of each complementing pulse of the input signal sothat it is less than the period of the delay. When a plurality ofcomplementing flip-flops are cascaded to form a counter, it is necessaryto provide pulse standardizers between the stages or to provide theequivalent :internal action limiting the effective duration (or morespecific'ally,,the amplitude time product) of the complementing pulseinputs. As a result, the maximum pulse 2,994,788 Patented Aug. 1, 196lrepetition frequency for a complementing flip-flop havin unconditionalsteering means is substantially less than the maximum pulse repetitionfrequency of the corresponding noncomplementing flip-flop because of thedesign tolerances required for the delay circuits and the input pulsestandardizer circuits. 7

The complementing flip-flop disclosed and claimed herein is providedwith conditional steering means. When a complementing input pulse isapplied to this circuit, the enabled steering gate applies a pulse tothe input terminal of the flip-flop, which pulse will cause theflip-flop to change its state. Means are provided to prevent reversal ofthe steering gates until each complementing pulse of the input signalterminates, or is no longer present. Thus the reversal of the steeringgates is conditioned upon the removal of each complementing input pulse.

Conditional steering represents the ideal means for preventing time racein a complementing flip-flop since the length of the period of the delaybetween the change in state of the flip-flop and the reversal of thesteering gates is determined by the width of each complementing inputpulse. As a consequence, a complementing flip-flop with conditionalsteering means, as taught herein, will operate with complementing inputpulses, the width of which may be of indefinite duration, e.g., a changein DC. level. Since there are no fixed time delays incorporated in acomplementing flip-flop having conditional steering, the maximum pulsereptition frequency of a complementing flip-flop with conditionalsteering is substantially the upper frequency limit of the correspondingnoncomplementing flip-flop.

It is, therefore, an object of this invention to improve complementingflip-flops.

A further object of this invention is to provide complementingflip-flops having conditional steering means.

It is a still further object of this invention to provide complementingflip-flops in which the reversal of the steering means is conditionedupon the removal of each complementing input pulse.

It is another object of this invention to provide a complementingflip-flop in which the steering and inhibiting functions areaccomplished through theme of magnetic cores.

It is still another object of this invention to provide complementingflip-flops in which the width of each complementing input pulse may besubstantially of any duration.

It is another object of this invention to provide complementingflip-flops in which the pulse width of each complementing input pulse,in excess of that necessary to trigger the complementing flip-flop isnot a factor in the proper operation of the complementing flip-flops.

Other objects and many of the attendant advantages of this inventionwill be readily appreciated as the same become better understood byreference to the following detailed description when considered inconnection with the accompanying drawing, wherein the single figure is aschematic diagram of the complementing flip-flop of this inventionemploying magnetic cores.

The device illustrated in the single figure of the drawing embodies theuse of conditional steering to a complementing flip-flop includingmagnetic cores. It has additional advantages in that it may serve as atransducer between transistor and magnetic circuitry. The device hasseveral unique characteristics; one of these is the relatively largeload that it can drive, and another is that the manner of use of themagnetic cores results in higher apparent squareness ratios, or higherspeeds, than predictable from the core characteristics.

It is possible to design circuits using PNP junction transistors of thealloy or surface barrier types; i.e., in the common emitterconfiguration, so that the transistors of such circuits will saturate,or bottom, if the potential of their bases with respect to theiremitters, which are generally at ground potential, are more negativethan '0.3 v. and so that the transistors will be substantially biasedoff if the potentials of their bases with respect to their emitters areapproximately -0.1 v., or more positive. These voltages obviously mayvary depending upon the characteristics of the transistors used, as iswell known in the art. In such circuits the potential of the collectorof a bottomed transistor will be approximately at ground potential,which potential, when applied to the base of a transistor in a similarconfiguration, is suificient to cut off the transistor. The devicedescribed and illustrated is an embodiment of the invention usingtransistor circuits having substantially such operating characteristics.

The master flip-flop 200 has two junction transistors 202, 204cross-coupled to form a saturated flip-flop. The steering and inhibitingfunctions are produced by one gate which includes transistor 206,magnetic cores 208, 212, and the other gate which includes transistor210 and the same magnetic cores 208, 212. It is understood that themagnetic cores may be considered the flip-flop also since they operatein this manner.

.On core 208 there are placed four windings, trigger winding 214, resetwinding 216, sensing winding 21-8, and set winding 220. On core 212there are placed trig- .ger winding 222, reset winding 224, sensingwinding 226, and set winding 28. Each of the windings is indicated ashaving one terminal dotted and the other undotted. In

the discussion that follows it will be'assumed that conventional currentflowing out of the dotted terminal of the winding will tend to changethe state of the core to a magnetic state denoted as 1, and thatconventional current flowing into the dotted terminal of a winding willtend to change the state of the core to a magnetic state denoted as 0.

j The base of transistor 202, input terminal 230 of master flip-flop200, is connected to the dotted terminal of sensing winding 226, and thebase of transistor 204, input terminal 232 of master flip-flop 200, isconnected to ,the dotted terminal of sensing winding 218. The undottedterminal of sensing winding 226 is connected to the collector oftransistor 204, and the undotted terminal of sensing winding 218 isconnected to the collector of transistor 202. The dotted terminal of setwinding 228 is connected to the dotted terminal of reset winding 216.The undotted terminal of reset winding 216 is directly connected to thecollector of transistor 206. The undotted terminal of set winding 228 isconnected through load resistor 234 to a suitable source of collectorpotential, V The dotted terminal of reset winding 224 is directlyconnected to the dotted terminal of set winding 220. The undottedterminal of reset winding 224 is connected to the collector oftransistor 210, and the undotted terminal of winding 220 is connectedthrough load resistor 236 to a suitable source of collector potential.Trigger windings 214, 222 are connected in series. The collector oftransistor 202 is connected to the base of transistor 206, and thecollector of transistor 204 is likewise connected to the base oftransistor 210. The collector of transistor 202 is connected throughload resistor 238 to a suit-able source of collector potential, V of theproper polarity. The collector of transistor 204 is likewise connectedthrough load resistor 240 to a suitable source of collector potential, Vof the proper potential.

For purposes of explaining the operation of the device illustrated inthe drawing, it is assumed that the initial condition of masterflip-flop 200 is such that transistor 202 is cut off and transistor 204is bottomed. Then, transistor 206, whose base is directly connected tothe collector of transistor 202, will be bottomed and transistor 210,whose base is connected to the collector of transistor 204, will be cutoil. The collector current of transistor 206 will flow in reset winding216 and set winding 228 of cores 208 and 212, respectively. Themagnetomotive force due to the collector current of transisand core 212in the 0 state. The magnetomotive force tor 206 flowing in these coilsputs core 208 in the 1 state contributed by the base current oftransistor 204 flowing through sensing winding 218 is negligible incomparison.

If a first complementing pulse of current is applied to input terminal242 and flows through trigger windings 214, 222 in such a direction asto drive cores 208, 212 to the 1 state, core 208 will not switch, orchange its magnetic state, since it is already in the 1 state. However,core 212, which is in the 0 state, is switched by the trigger pulse tothe 1 state. The switching of core 212 from the O to the 1. stateinduces a voltage in sensing winding 226, which causes its dottedterminal to be at a relatively negative potential. Since input terminal230 is connected to the dotted terminal of sensing winding 226, thenegative potential induced in sensing winding 226 bottoms transistor.202.

When transistor 202 bottoms, the potential of its collector increasesapproximately to ground level which causes transistor 206 to cut oif.This increase is connected through winding 218 to the input terminal232. cutting off transistor 204 and changing the state of the masterflip-flop 200. The potential of the collector of transistor 204decreases, becomes more negative, which maintains transistor 202bottomed. When transistor 204 cuts oit, the negative potential of itscollector bottoms transistor 210. The collector current of transistor210 then flows through reset winding 224 and set winding 220.

The magnetomotive force of the complementing pulse is of suflicientmagnitude to overcome the opposing magnetomotive force produced by thecollector current of transistor 210, holding both core 208 and core 212in the 1 state for the duration of the input pulse. Upon the conclusionof the input pulse, cores 208, 212 are released to control the masterflip-flop 200 acting through transistor 210. Since transistor 210 isbottomed, its collector current flows through reset winding 224 and setwindings 220, changing the state of core 208 to the 0 or enabled state.Core 212 remains in the 1, or disabled, state. The spurious pulsesproduced by core 208 changing from the l to the 0 state are in suchdirections as to maintain the new state of master flip-flop 200.

The application of the next, or second, complementing input currentpulse will change core 208 from the 0 to the '1 state inducing anegative potential in sensing winding 218, which is applied to inputterminal 232, the base of transistor 204, causing transistor 204 tobottom, which causes transistor 202 to cut off, changing the state ofmaster flip-flop 200. When transistor 204 bottoms, its collectorapproaches ground potential cutting off transistor 210. While the secondcomplementing pulse is present, it maintains cores 208, 212 in the 1state. When the second complementing pulse terminates, the collectorcurrent of transistor 206 flows through windings 216, 228, switchingcore 212 to the 0, or enabled, state and maintaining core 208 in the 1,or disabled, state.

Master flip-flop 200 has a definite triggering threshold; thus thecomplementing flip-flop will have sufficient noise immunity to permitreliable operation at relatively low signal-to-noise ratios. When themaster flip-flop is at rest, the state of cores 208, 212 is controlledby master flip-flop 200 through transistors 206, 210. Transistors 206,210 provide isolation between master flip-flop 200 and cores 208, 212,which results in improved performance of the device. The D.C.magnetomotive force applied to the cores controls their operation,giving in effect biased cores whose natural remanence points arerelatively unimportant. As a result, it is possible to accuratelyestablish a suitable pseudo-remanence, or D.C. operating, point by thechoice of the number of turns wound on the cores and the steady statetransistor-collector currents.

Since. transistors 206, 210 are either cut as or bottomed, theircollectors currents are determined only by the collector supplypotential V and the values of resistors 234, 136. The pseudo-remanenceeifect may be exploited to provide very large signal-to-noise ratios, orto make possible operation with nonsquare magnetic cores such asferrites. The degree of nonsquareness permitted of the cores isdetermined by the available magnetomotive force and the minimumsignal-to-noise ratio required.

The factors which make core-squareness noncritical make it possible tooperate the complementing flip-flop at complementing pulse repetitionfrequencies considerably in excess of those predicted on the basis ofcomplete core switching. Once the change of flux in a core is sufiicientto trigger master flip-flop 200, completion of core switching is notessential, provided that by the time the next complementing pulse isapplied, the core is sufiiciently close to its opposite remanence (orpseudo-remnence) to initiate the next cycle. Accordingly, a highcomplementing pulse repetition frequency can coerce the cores intoalternate states in a much shorter period of time than that required forcomplete switching without prejudicing reliable triggering of the masterflip-flop.

The complementing fiip-fiop of the single figure also provides a DC.level to indicate the core states since the potentials of the collectorsof transistors 206, 210 indicate the states of cores 208, 212. Thischaraceristic provides for nondestructive readout. Transistors 206, 210also serve to isolate the switching wave forms appearing across loadresistors 236, 234 due to changes in state of the master flip-flop 200.

The state of master flip-flop 200 may be determined by the potentials ofthe collectors of transistors 202, 204 of the master flip-flop or by thepotentials of collectors 206, 210 of the steering gates. These terminalsmay also serve as the output terminals of the complementing flip-flop.Master flip-flop 200 may be set or reset by means of pulses applied toone or the other of a pair of transistors, one being connected inparallel with transistor 202 and the other being connected in parallelwith transistor 204.

In the example of the embodiment of the invention illustrated, all thetransistors are SN1l3s. As is well known in the art, NPN transistors maybe substituted for PNP transistors provided the polarities of the supplyvoltages and the polarities of the triggering signals are reversed.

The values and/or types of components and the voltages appearing on thedrawing are included, by way of example only, as being suitable for thedevices illustrated. It is to be understood that circuit specificationsin accordance with the invention may vary with the design of anyparticular application.

Obviously, many modifications and variations of the present inventionare possible in the light of the above teachings. It is, therefore, tobe understood that within the scope of the appended claims, theinvention may be practiced other than as specifically described andillustrated.

I claim:

1. A bistable flip-flop comprising a first transistor and a secondtransistor each having a base, an emitter, and a collector; a firstmagnetic core and a second magnetic core each having a reset winding, asensing winding, and a set winding; means coupling the base of saidfirst transistor to said collector of said second transistor throughsaid sensing Winding of said second core; means coupling said base ofsaid second transistor to said collector of said first transistorthrough said sensing winding of said first core; a first drivertransistor and a second driver transistor each having a base, anemitter, and a collector; means coupling said collector of said firstdriver transistor to a source of potential through said reset winding ofsaid first core and said set winding of said second core; means couplingsaid collector of said second driver transistor to a source of potentialthrough said reset winding of said second core and said set winding ofsaid first core; coupling means between said base of said first drivertransistor and said collector of said first transistor; means couplingsaid base of said second driver transistor to said collector of saidsecond transistor; a source .of potential coupled to both bases of saiddriver transistors; means coupling said emitters of all of saidtransistors to a source of reference potential; and, series triggerwindings inductively coupled to said cores for receiving pulses tochange the state of the flip-flop.

2. A bistable magnetic core flip-flop comprising a first core and asecond core each having a reset winding, a sensing winding, and a setwinding; a circuit including a first transistor and a second transistor;a circuit including a third transistor and a fourth transistor; each ofsaid transistors having a base, an emitter, and a collector; meanscoupling the base of the first transistor to the collector of the secondtransistor and to a source of po tential; means coupling the collectorof the third transistor to the base of the fourth transistor and to asource of potential; a source of reference potential coupled to theemitters of all of said transistors; means coupling the base of thesecond transistor to the base of the fourth transistor through thesensing winding of said second core; means coupling the base of thethird transistor to the base of the first transistor through the sensingwinding of said first core; means coupling the collector of the firsttransistor to a source of potential through said reset winding of saidfirst core and said set winding of said second core; means coupling thecollector of said fourth transistor to a source of potential throughsaid reset winding of said second core and said set winding of saidfirst core; and, means coupled to said cores for changing the state ofsaid magnetic core flip-flop.

3. The combination as defined in claim 2 wherein said means for changingthe state of the flip-flop includes series windings inductively coupledto said first and said second core and a terminal coupled to saidwindings for receiving switching pulses.

4. A complementing flip-flop comprising a master flipfiop comprising twotransistors, said master flip-flop having two distinguishable stablestates and first and second input terminals, said master flip-flopassuming one of its two states when a proper signal is applied to thefirst input terminal and assuming the other of its two states when aproper signal is applied to the second input terminal, a third inputterminal adapted to have an input signal comprising a plurality ofcomplementing pulses applied thereto, and circuit means comprised of apair of transistors and a pair of magnetic cores, controlled by themaster flip-flop, and connected to the third terminal, said circuitmeans responsive to the application of each complementing pulse appliedto the third terminal for applying a proper signal to that inputterminal of the master flip-flop which causes said master flip-flop tochange its state, said circuit means applying one such proper pulse tothe master flipflop for each complementing pulse applied to the thirdinput terminal.

5. A complementing flip-flop comprising a first magnetic core and asecond magnetic core; each of said cores having a trigger winding, areset winding, a sensing winding, and a set winding; a first coredriving transistor and a second core driving transistor; a mastersaturation fiipflop comprising a first and a second transistor; circuitmeans connecting the base of the first transistor of the masterflip-flop to the collector of the second transistor of the masterflip-flop through the sensing winding of the second core, circuit meansconnecting the base of the second transistor of the master flip-flop tothe collector of the first transistor of the master flip-flop throughthe sensing winding of the first core, and circuit means for connectingthe collectors of the first and second transistors of the masterflip-flop to a source of collector potential; means connecting thecollector of the first core driving transistor to a source of collectorpotential through the reset Winding of the first core and the setwinding of the second core; means for connecting the collector of thesecond core driving transistor to a source of collector potentialthrough the reset winding of the second core and the set winding of thefirst core; circuit means connecting the base of the first core drivingtransistor to the collector of the first transistor of the masterflip-flop; circuit means connecting the base of the second core driv-References Cited in the file .of this patent UNITED STATES PATENTSWesslund et al. Feb. 17, 195 9

